How to build C/C++ files using make and Makefile.
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The Makefile is used by “make” to compile and link a program.
The “Makefile” consists of rules with the following syntaxe:
target: dependency1 dependency2 ... dependencyN
command
The target can be:
- the file that is generated by the command (i.e. executable or object files)
- the name of an action that should be done, such as “clean”
dependencies are other targets or files that are used to create the current target.
The command is the action that will be executed by the “make” tool. The command is executed only if the target file does not exist or if any dependency is updated. .
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