A Reconfigurable Synchrophasor Synchronization Gateway & Controller Architecture for DERs - SGSMA
Presenter:
Dr. Prottay M. Adhikari
Citation:
P.M. Adhikari, L. Vanfretti, C. Mishra, and K. Jones, “A Reconfigurable Synchrophasor Synchronization Gateway & Controller Architecture for DERs,” 2022 IEEE International Conference on Smart Grid Synchronized Measurements and Analytics – SGSMA, Split, Croatia, May 24h - 26th 2022.
Paper:
https://tinyurl.com/sgsma-ssgc
Abstract:
In grid applications featuring various Distributed Energy Resources (DERs), e.g. microgrids, synchrophasor applications would require an extensive infrastructure including substantial instrumentation-hardware, communication network extensions and controller installations, like in WAMPAC systems. Thus, such overall implementation becomes cost-prohibitive. To address this issue, this paper proposes a dedicated centralized synchronization hardware to replace aggregation PDCs, and supplementary control functions into a single piece of hardware. This particular hardware is termed as Synchrophasor Synchronization Gateway & Controller (SSGC). The proposed SSGC hardware utilizes the Khorjin library to parse IEEE C37.118 data, concurrently from multiple devices, and in an embedded hard real-time (RT) computer system through a synchronization layer. Supplementary control actions, e.g. power flow control, are implemented on top of the synchronization layer. This SSGC based architecture is tested with a RT microgrid model implemented on Typhoon HIL-604 RT simulator. The communication interface between the micrgrid and the SSGC was tampered through external hardware by introducing network delays \& data-drops, and its performance was analyzed.
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